Unit 2

Combinational Logic Design

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Unit 2: Combinational Logic Design

This unit covers Boolean algebra, logic gates, Karnaugh maps, and combinational circuit design including encoders, decoders, and displays.


Lessons

CodeLessonTopics
2.1.0Intro to Logic & AOI GatesAND, OR, INVERTER basics
2.1.1Truth TablesTruth tables, logic expressions
2.1.2Circuit AnalysisReading and analyzing AOI circuits
2.1.3AOI ImplementationBuilding circuits from expressions
2.1.4Boolean AlgebraTheorems, postulates, simplification
2.1.5DeMorgan’s TheoremDeMorgan’s, bubble pushing
2.2.1Karnaugh MapsK-maps, grouping, don’t cares
2.2.2Universal GatesNAND/NOR as universal gates
2.2.3AOI ConversionConverting AOI to NAND/NOR
2.2.4K-Map Grouping & POSProduct of Sums
2.2.5Fireplace ControlDesign challenge
2.2.6Majority VoteDesign challenge
2.3.1Hexadecimal & OctalNumber system conversions
2.3.2Seven-Segment DisplayBCD to 7-segment decoding
2.3.3MUX & DEMUXMultiplexers, demultiplexers
2.3.4Two’s ComplementSigned numbers, complement arithmetic
2.3.5XOR/XNOR GatesExclusive OR/NOR gates
2.3.6Binary AddersHalf adder, full adder, ripple carry
2.4.1Six-Digit Date DisplayDesign challenge project